CBIC-V, a new very high speed complementary silicon bipolar IC process

A complementary silicon bipolar process development for high-performance 5-V analog and mixed analog-digital applications is discussed. The process yields fast vertical pnp transistors (f _T≈5 GHz at 3 V) and npn transistors (f_T≈13 GHz at 3 V). A selective epitaxial growth technique is used for active device fabrication to achieve compact and planar dielectric component isolation. For a reduced thermal budget, rapid thermal annealing and low-temperature chemical-vapor-deposited dielectrics are used extensively. Circuit components are interconnected by two-level Ti-Pt-Au metallization