A study on thermal stress of power IC die bonding

Author

Wang, Yangang ; Wang, Yajie ; Cui, Xueqing ; Wu, Wuchen

Author_Institution

Electron. Eng. Dept., Beijing Polytech. Univ., China

Volume

1

fYear

2001

fDate

2001

Firstpage

109

Abstract

Thermal stress due to the thermal mismatch in power IC packaging will affect the long-term reliability of a power IC. This paper studied the thermal stress analysis method and a way to reduce the stress in an IC chip. Numerical distribution values of thermal stress in chip packaging and the optimal parameter design method to reduce chip thermal stress were also provided in this paper

Keywords

integrated circuit bonding; integrated circuit packaging; integrated circuit reliability; power integrated circuits; stress analysis; thermal analysis; thermal management (packaging); thermal stresses; chip packaging; long-term reliability; optimal parameter design method; power IC die bonding; power IC packaging; stress reduction; thermal mismatch; thermal stress analysis method; thermal stress simulation; Ceramics; Electronic packaging thermal management; Integrated circuit packaging; Microassembly; Power integrated circuits; Residual stresses; Temperature; Thermal conductivity; Thermal engineering; Thermal stresses;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State and Integrated-Circuit Technology, 2001. Proceedings. 6th International Conference on

Conference_Location

Shanghai

Print_ISBN

0-7803-6520-8

Type

conf

DOI

10.1109/ICSICT.2001.981434

Filename

981434