DocumentCode :
2204731
Title :
SDRAM - high performance memory devices running CPU bus speeds
Author :
Cosoroaba, Adrian B.
Author_Institution :
Fujitsu Microelectron. Inc., San Jose, CA, USA
fYear :
1996
fDate :
11-14 Apr 1996
Firstpage :
604
Lastpage :
607
Abstract :
Synchronous DRAMs (SDRAMs)are DRAM type products that can offer an evolutionary change with performance advantages for memory systems previously unachievable with traditional DRAMs. These advantages are based on a synchronous I/O interface and improved internal architecture that enables faster data throughput rates. Performance estimations done to compare DRAMs with SDRAMs for various miss ratios and CPU clock/bus clock ratios show significant system performance improvement. With their evolutionary transition SDRAMs are minimizing the risks of system designers. This is an important factor in the short product cycle design environment. The significant system performance improvements obtained by these devices are at little or no extra cost. SDRAMs can also keep up with increasing bus speeds narrowing the performance gap between main memory and CPUs. The synchronous I/O, multiple internal banks and high burst modes are bringing SDRAMs closer that ever to CPU performance
Keywords :
DRAM chips; channel capacity; computer interfaces; memory architecture; CPU bus speeds; CPU clock/bus clock ratios; data throughput rates; high burst modes; high performance memory devices; internal architecture; miss ratios; multiple internal banks; product cycle design environment; synchronous DRAMs; synchronous I/O interface; system designer; Bandwidth; Clocks; Costs; Microelectronics; Performance analysis; Product design; Random access memory; SDRAM; System performance; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Southeastcon '96. Bringing Together Education, Science and Technology., Proceedings of the IEEE
Conference_Location :
Tampa, FL
Print_ISBN :
0-7803-3088-9
Type :
conf
DOI :
10.1109/SECON.1996.510143
Filename :
510143
Link To Document :
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