Title :
A single chip processor architecture for video rate two-dimensional digital filtering
Author :
Park, Seong-Mo ; Alexander, Winser E.
Author_Institution :
Dept. of Electr. & Comput. Eng., Old Dominion Univ., Norfolk, VA, USA
Abstract :
A VLSI single-chip processor architecture for real-time 2-D digital signal-processing applications is presented. This architecture extends the concept of using a single processing unit to the use of multiple processing units. The advantage of this architecture is that the complexity and the number of computations per unit of input does not increase as the size of 2-D input data increases. Thus, it can process a very large amount of 2-D data efficiently and nearly in real-time. The processor architecture yields a simple and efficient system configuration. It is especially suited for a large class of digital signal-processing algorithms classified as discrete linear shift-invariant systems
Keywords :
VLSI; computerised picture processing; digital signal processing chips; multiprocessing systems; real-time systems; two-dimensional digital filters; 2-D digital signal-processing; VLSI single-chip processor architecture; multiple processing units; system configuration; video rate two-dimensional digital filtering; Computer architecture; Concurrent computing; Digital filters; Digital signal processing chips; Equations; Filtering; Signal processing algorithms; Throughput; Two dimensional displays; Very large scale integration;
Conference_Titel :
System Theory, 1989. Proceedings., Twenty-First Southeastern Symposium on
Conference_Location :
Tallahassee, FL
Print_ISBN :
0-8186-1933-3
DOI :
10.1109/SSST.1989.72552