Systematic Power Minimization in Multibit Delta-Sigma Analog-to-Digital Converters

Delta-sigma analog-to-digital converters (ADCs) have widespread applications ranging from audio to broadband communications. As portable devices become more popular, low-power design techniques for delta-sigma ADCs have to be explored to maximize battery life. This paper addresses power reduction in delta-sigma ADCs from two perspectives, both with practical considerations. First, a unity-gain signal transfer function (STF) is employed to lower the opamp power dissipation in the ADC loop filter. Second, at the architectural level, the noise transfer function (NTF) is synthesized with a generic topology. Loop filter coefficients are then computed, using the latest nonconvex polynomial optimization techniques, to further minimize dynamic power consumption. Superiority of the ADC thus synthesized is confirmed by numerical experiments