Title :
Backend process for cylindrical Ru/Ta2O5/Ru capacitor for future DRAM
Author :
Lin, J. ; Suzuki, T. ; Minakata, H. ; Shimada, A. ; Tsunoda, K. ; Fukuda, M. ; Kurahashi, T. ; Fukuzumi, Y. ; Hatada, A. ; Sato, A. ; Sun, P.H. ; Ishibashi, Y. ; Tomita, H. ; Nishikawa, N. ; Ito, E. ; Liu, W.C. ; Chu, C.M. ; Suzuki, R. ; Nakabayashi, M. ;
Author_Institution :
Technol. Dev. Div., Fujitsu Ltd., Yokohama, Japan
Abstract :
A novel backend process is developed for the cylindrical Ru/Ta2O5/Ru capacitor for 130 nm generation DRAMs to achieve good electrical characteristics. Forming gas (3%H2/97%N2) anneal (FGA) induced degradation can be effectively suppressed. For the cylindrical Ru/Ta2O5 /Ru capacitor with full backend processes, including passivation layer formation and a FGA, the cell leakage current and cell capacitance are 1 fA (at ±0.8 V at 85°C) and 15fF, respectively
Keywords :
DRAM chips; annealing; capacitance; ferroelectric capacitors; ferroelectric storage; leakage currents; passivation; ruthenium; tantalum compounds; 0.8 V; 1 fA; 130 nm; 15 fF; 85 degC; H2-N2; Ru-Ta2O5-Ru; Si3N4; backend process; cell capacitance; cell leakage current; cylindrical Ru/Ta2O5/Ru capacitor; electrical characteristics; forming gas anneal induced degradation suppression; future DRAM; passivation layer formation; Capacitors; Cleaning; Etching; Fabrication; Lithography; Mass spectroscopy; Random access memory; Resists; Surface contamination; Tin;
Conference_Titel :
Solid-State and Integrated-Circuit Technology, 2001. Proceedings. 6th International Conference on
Conference_Location :
Shanghai
Print_ISBN :
0-7803-6520-8
DOI :
10.1109/ICSICT.2001.981452
