Title :
The p-channel Si nano-crystal memory
Author :
Shin, Hyungcheol ; Kim, Llgwwn ; Han, Kwangseok
Author_Institution :
Dept. of Electron. Eng. & Comput. Sci., KAIST, Taejon, South Korea
Abstract :
The feasibility of p-channel nano-crystal memory is demonstrated. The programming mechanism of p-channel nano-crystal memory was investigated by charge separation measurement. For small programming voltage, hole tunneling is dominant. However, valence band electron tunneling becomes dominant for large voltage
Keywords :
elemental semiconductors; flash memories; integrated circuit measurement; integrated memory circuits; nanotechnology; silicon; tunnelling; valence bands; EEPROM; Si; charge separation measurement; hole tunneling; large voltage; p-channel Si nano-crystal memory; programming mechanism; small programming voltage; valence band electron tunneling; Charge carrier processes; Charge measurement; Current measurement; EPROM; Electrons; MOSFETs; Maintenance; Nanoscale devices; Threshold voltage; Tunneling;
Conference_Titel :
Solid-State and Integrated-Circuit Technology, 2001. Proceedings. 6th International Conference on
Conference_Location :
Shanghai
Print_ISBN :
0-7803-6520-8
DOI :
10.1109/ICSICT.2001.981455
