DocumentCode
2205561
Title
Design space exploration for efficient computing in Solid State drives with the Storage Processing Unit
Author
Minglani, Manas ; Nagarajan, Ashwin ; Deshapande, Sneha ; Everson, Luke ; Lilja, David J.
Author_Institution
Electrical and Computer Engineering Department, University of Minnesota - Twin Cities, Minneapolis, USA
fYear
2015
fDate
6-7 Aug. 2015
Firstpage
87
Lastpage
94
Abstract
Computer architects face two major challenges in building future exa-scale systems: high energy consumption and the increasing gap between processor and storage speeds. Moving the processing closer to the data, inside the persistent storage, will help mitigate these challenges. This will result in a hierarchical compute structure across the system with a major component of the processing hierarchy inside the Solid State Drive. This new architecture is called the Storage Processing Unit. We perform design space exploration and propose several optimizations to the application space and the architectural space. This research significantly improves the energy use and performance of the system. We observe energy savings from 11 – 423X and performance gains from 4 – 66X for applications including k-means, Sparse BLAS, and others.
Keywords
Ash; Computer architecture; Coprocessors; Energy consumption; Layout; Process control; Sparse matrices; Active flash; SSD architecture; energy-efficient computing; hierarchical computation; performance evaluation; storage systems;
fLanguage
English
Publisher
ieee
Conference_Titel
Networking, Architecture and Storage (NAS), 2015 IEEE International Conference on
Conference_Location
Boston, MA, USA
Type
conf
DOI
10.1109/NAS.2015.7255225
Filename
7255225
Link To Document