Title :
Design for testability and built-in self-test of integrated circuits and systems: how these can add value to your products
Author_Institution :
Dept. of Electr. Eng., British Columbia Univ., Vancouver, BC, Canada
Abstract :
Success in the competitive global markets of integrated circuits and electronics systems requires the design and fabrication of increasingly complex products coupled with ever-increasing quality requirements and ever-decreasing market windows of opportunity. Gone are the days when integrated circuit testing was it task not considered to add any value to a product and thus when test responsibilities could simply be passed on from designers to test engineers, leaving all testing considerations for the bad-end of the design or manufacturing process. Testing costs are often reported as representing anywhere from 10 to 50% or more of total product development costs. This paper reviews the principles of integrated circuit design for testability (DFT) and shows how such practice can be valuable and helpful to successfully harness the available semiconductor technology to meet stringent market and customer requirements. Structured DFT techniques are reviewed, and, in particular, the highly effective DFT strategy known as built-in self-test (BIST)
Keywords :
built-in self test; design for testability; integrated circuit design; integrated circuit testing; BIST; DFT strategy; built-in self-test; design for testability; integrated circuits; structured DFT techniques; Built-in self-test; Circuit testing; Costs; Coupling circuits; Design engineering; Design for testability; Fabrication; Globalization; Integrated circuit testing; Process design;
Conference_Titel :
Circuits and Systems, 1995., Proceedings., Proceedings of the 38th Midwest Symposium on
Conference_Location :
Rio de Janeiro
Print_ISBN :
0-7803-2972-4
DOI :
10.1109/MWSCAS.1995.510189