Title :
An Alternative Process Architecture for CMOS Based High Side RESURF LDMOS Transistors
Author :
Holland, P.M. ; Igic, P.M.
Author_Institution :
Electron. Syst. Design Centre, Wales Univ., Swansea
Abstract :
An alternative CMOS manufacturing process architecture for implementing power integrated circuits that may be used for applications requiring a bridge topology is presented. A RESURF N-LDMOS high-side compatible power transistor was designed onto the new process using TSuprem4 and Medici TCAD software. Masks were designed using Cadence Virtuoso and the new structure was manufactured at X-Fab UK Ltd. The physical results show good transistor characteristics compatible for high-side applications. The Specific RDSon for the new device is 260mOmegamm2 and breakdown voltage for both high-side and low-side operation exceeds 100V
Keywords :
CMOS integrated circuits; MOSFET; power integrated circuits; power transistors; 100 V; CMOS manufacturing process architecture; Cadence Virtuoso; Medici TCAD software; RESURF LDMOS transistors; TSuprem4 software; breakdown voltage; bridge topology; power integrated circuits; power transistor; Application software; Breakdown voltage; Bridge circuits; CMOS process; Circuit topology; Manufacturing processes; Medium voltage; Power integrated circuits; Power transistors; Substrates;
Conference_Titel :
Microelectronics, 2006 25th International Conference on
Conference_Location :
Belgrade
Print_ISBN :
1-4244-0117-8
DOI :
10.1109/ICMEL.2006.1650929
