A novel approach for ASIC layout generation

A novel ASIC layout generation approach called sea-of-cells is presented. Instead of loosing transistors, the sea-of-cells masterslice is built up from basic cells (BCs). The approach mandates the decomposition of the circuit using a small set of basic logic functions which are directly available in the masterslice. Basic logic functions are implemented by basic cells, designed according to the transparency principle. This allows a full over-the-cell (FOTC) routing strategy which leads to increase in master occupation, shorter wiring connections and more flexibility for cell placement