DocumentCode
2206670
Title
Sub-0.1 μm MOSFET fabrication using 248 nm lithography by resist trimming technique in high density plasmas
Author
Sin, Chian-Yuh ; Loong, Loh Wei ; Chen, Bing-Hung ; Yujie ; Yelehanka, Pradeep ; Chan, Lap
Author_Institution
Dept. of Chem. & Environ. Eng., Nat. Univ. of Singapore, Singapore
Volume
1
fYear
2001
fDate
2001
Firstpage
460
Abstract
A resist trimming technique using oxygen containing gas mixture in high-density plasma is presented that allows the fabrication of sub-0.1 μm MOSFET with 248 nm lithography. The trimming step is done in-situ as part of the gate etch processes. The effect of the important etcher parameters such as RF source power, bias voltage, O2 gas flow, reactor pressure and over-etch percentage on the process characteristics such as trim rate, uniformity and microloading has been investigated by means of statistically designed experiments. These trends have been applied to the process optimization for a single layer photoresist, binary masks and conventional 248 nm illumination to fabricate 0.08 μm gate electrodes. Anisotropic profiles of polysilicon lines can be obtained with the trimmed resist as a mask. The effect of the trimming step on critical dimension control is quantified, and the electrical performance of the transistors is presented. The resist trimming process was found to be controllable and reproducible
Keywords
CMOS integrated circuits; MOSFET; integrated circuit technology; sputter etching; ultraviolet lithography; 0.08 to 1 micron; 248 nm; CF4/O2 gas chemistrty; DUV lithography; MOSFET fabrication process; O2; O2 gas flow; RF source power; Si; anisotropic profiles; bias voltage; binary masks; critical dimension control; deep UV lithography; etcher parameters; gate etch processes; high-density plasma; over-etch percentage; oxygen containing gas mixture; polysilicon gate etching; polysilicon lines; process characteristics; process optimization; reactor pressure; resist trimming technique; single layer photoresist; statistically designed experiments; transistor electrical performance; trim rate; uniformity; Etching; Fabrication; Fluid flow; Lithography; MOSFET circuits; Plasma applications; Plasma sources; Radio frequency; Resists; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated-Circuit Technology, 2001. Proceedings. 6th International Conference on
Conference_Location
Shanghai
Print_ISBN
0-7803-6520-8
Type
conf
DOI
10.1109/ICSICT.2001.981517
Filename
981517
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