Optimization Issue in Interconnect Analysis

State-of-the-art semiconductor devices with feature sizes in the deca nanometer regime require extremely shrinked geometries for their interconnect structures. Since various physics-based limits are already reached or, at least, rapidly approached, new materials are considered. The arrangements of these new materials can often not yet be rigorously described due to limited knowledge and limited resources, such as time and money. For practical applications, the uncertainty of material parameters and the limited knowledge of material interactions can be compensated by the introduction of parameterized models to describe the global behaviour sufficiently. In this work, such models are used to calibrate and optimize complete interconnect structures for enhanced applications