Title :
Plasma induced damage on sub-0.5 μm MOSFETs using a CMOS driver as input protection
Author :
Gill, Chai ; Porter, Jeff ; McEntarfer, Phil
Author_Institution :
Semicond. Product Sector, Motorola Inc., Chandler, AZ, USA
Abstract :
Plasma charging effects on a sub-0.5 μm CMOS process with 90 Å gate oxide and triple layer metal was studied for plasma induced damage with diode and ESD protection schemes. The n and p channel transistors in a CMOS driver enabled discharging of positive and negative charges using the source-drain region as diodes. This study also showed that the p channel devices are more sensitive to plasma charging than n channels. The diode protection provided to the transistor gate reduced the magnitude of plasma process induced damage, but a large antenna ratio on protected gates was observed to produce measurable shifts in Vt and Idsat
Keywords :
CMOS integrated circuits; MOSFET; driver circuits; electrostatic discharge; plasma materials processing; protection; semiconductor device testing; semiconductor diodes; surface charging; surface treatment; 0.5 micron; 90 angstrom; CMOS driver; CMOS driver input protection; CMOS process; ESD protection scheme; MOSFETs; Si; SiO2-Si; antenna ratio; diode protection; diode protection scheme; gate oxide; n-channel transistors; negative charge discharging; p-channel device sensitivity; p-channel transistors; plasma charging; plasma charging effects; plasma induced damage; plasma process induced damage; positive charge discharging; protected gates; saturation drain current; source-drain region diodes; threshold voltage; transistor gate; triple layer metal; Antenna measurements; CMOS process; Diodes; Driver circuits; Electrostatic discharge; MOSFETs; Plasma devices; Plasma measurements; Plasma sources; Protection;
Conference_Titel :
Plasma Process-Induced Damage, 1998 3rd International Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
0-9651577-2-5
DOI :
10.1109/PPID.1998.725584
