DocumentCode
2207610
Title
Tunnel oxide degradation mechanism in flash devices for via etching process
Author
Takebuchi, M. ; Isobe, K. ; Nishimura, T. ; Kanda, M. ; Kimitsuka, A.
Author_Institution
Dept. of Microprocess. Eng., Toshiba Corp., Kawasaki, Japan
fYear
1998
fDate
4-5 Jun 1998
Firstpage
116
Lastpage
119
Abstract
The tunnel oxide degradation mechanism for the via hole RIE process has been investigated in flash memory LSIs. The degraded tunnel oxide generated ultra low leakage current (ULLC) was caused by trapping. The tunnel oxide thickness dependence of ULLC appearance has been observed to be between 10 and 16 nm. Plasma induced charging current generated by the trapping is considered to flow between metal-1 and the substrate through the control gate, interpoly insulating film, floating gate and tunnel oxide at the via hole etching end point, since the ULLC appearance has been observed to have no dependence upon overetching time and RF step-down power
Keywords
dielectric thin films; electron traps; flash memories; hole traps; integrated circuit interconnections; integrated circuit metallisation; integrated circuit testing; leakage currents; plasma materials processing; sputter etching; surface charging; 10 to 16 nm; RF step-down power; Si; SiO2-Si; control gate; degraded tunnel oxide generated ultra low leakage current; flash devices; flash memory LSIs; floating gate; interpoly insulating film; overetching time; plasma induced charging current; trapping; tunnel oxide; tunnel oxide degradation mechanism; tunnel oxide thickness dependence; via etching process; via hole RIE process; via hole etching end point; Degradation; Etching; Flash memory; Insulation; Leakage current; Nonvolatile memory; Plasma applications; Power generation; Radio frequency; Substrates;
fLanguage
English
Publisher
ieee
Conference_Titel
Plasma Process-Induced Damage, 1998 3rd International Symposium on
Conference_Location
Honolulu, HI
Print_ISBN
0-9651577-2-5
Type
conf
DOI
10.1109/PPID.1998.725588
Filename
725588
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