• DocumentCode
    2207728
  • Title

    Multiplierless Polynomial-Operator-Based IR Filters for Efficient VLSI Implementation

  • Author

    Lei, Chi-Un ; Wong, Ngai

  • Author_Institution
    Dept. of Electr. & Electron. Eng., Hong Kong Univ.
  • fYear
    2006
  • fDate
    14-17 Nov. 2006
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    An improved multiplierless digital filter in transposed direct form II (DFIIt) structure is proposed for efficient VLSI implementation. The traditional delay operator is replaced with standardized polynomial operator. Coefficient scaling is implemented using canonical signed digit (CSD) and subexpression sharing. The proposed structure minimizes roundoff noise gain and further reduces hardware complexity
  • Keywords
    IIR filters; VLSI; CSD; DFIIt structure; IIR filter; VLSI implementation; canonical signed digit; coefficient scaling; digital filter; infinite impulse response; multiplierless polynomial-operator; subexpression sharing; transposed direct form II; very large scale integration; Costs; Delay; Digital filters; Equations; Feedback; Hardware; Noise reduction; Polynomials; Transfer functions; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    TENCON 2006. 2006 IEEE Region 10 Conference
  • Conference_Location
    Hong Kong
  • Print_ISBN
    1-4244-0548-3
  • Electronic_ISBN
    1-4244-0549-1
  • Type

    conf

  • DOI
    10.1109/TENCON.2006.343904
  • Filename
    4142535
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2207728