Title :
Toward charging free plasma processes: phase space modeling between pulsed plasma and microtrench
Author :
Makabe, T. ; Matsui, J. ; Shibata, M. ; Nakano, N.
Author_Institution :
Keio Univ., Yokohama, Japan
Abstract :
Local excess charging is one of the causes of damage in ULSI circuit fabrication, i.e. anomalous etching and electrical breakdown of the gate oxide. The interface between a pulsed plasma and a microstructure on a wafer is investigated by phase space modeling, with the focus on charging free processing
Keywords :
ULSI; integrated circuit yield; plasma materials processing; semiconductor process modelling; sputter etching; surface charging; surface structure; Si; SiO2-Si; ULSI circuit fabrication; anomalous etching; charging damage; charging free plasma processes; electrical breakdown; gate oxide; local excess charging; microtrench; phase space modeling; pulsed plasma; pulsed plasma-wafer microstructure interface; Circuits; Electric breakdown; Etching; Fabrication; Microstructure; Plasma applications; Plasma materials processing; Semiconductor device modeling; Space charge; Ultra large scale integration;
Conference_Titel :
Plasma Process-Induced Damage, 1998 3rd International Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
0-9651577-2-5
DOI :
10.1109/PPID.1998.725598
