DocumentCode
2208241
Title
Pipelined Intra Prediction Using Shuffled Encoding Order for H.264/AVC
Author
Lee, Wonjae ; Lee, Seongjoo ; Kim, Jaeseok
Author_Institution
Dept. of Electr. & Electron. Eng., Yonsei Univ., Seoul
fYear
2006
fDate
14-17 Nov. 2006
Firstpage
1
Lastpage
4
Abstract
In this paper, we propose a pipelined intra prediction using shuffled encoding order for H.264/AVC. Due to a dependency problem of 4times4 intra prediction mode, a new 4times4 block cannot be predicted before reconstruction of a previous 4times4 block. To minimize this latency, we shuffle the encoding order of 4times4 intra prediction while maintaining the consistency with the standard. To further reduce the processing time, two prediction modes are not used in some blocks. With the proposed method, we can implement the intra prediction block as a pipelined architecture. The processing time can be reduced by maximum 40%, because the latency caused by reconstruction of the previous 4times4 block was hidden. It was implemented into the hardware with some parallel processing architecture. The required cycles were 470 cycles
Keywords
code standards; parallel architectures; pipeline processing; prediction theory; video coding; H.264-AVC; automatic video coding; parallel processing architecture; pipelined intra prediction mode; shuffled encoding; Automatic voltage control; Delay; Encoding; Hardware; ISO standards; Image coding; Image generation; Image reconstruction; Pixel; Video coding;
fLanguage
English
Publisher
ieee
Conference_Titel
TENCON 2006. 2006 IEEE Region 10 Conference
Conference_Location
Hong Kong
Print_ISBN
1-4244-0548-3
Electronic_ISBN
1-4244-0549-1
Type
conf
DOI
10.1109/TENCON.2006.343970
Filename
4142560
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