DocumentCode
2208398
Title
The PowerPC 604 microprocessor - multimedia ready
Author
Fuller, Sam ; McGarity, Ralph C. ; Song, S.P.
Author_Institution
Motorola Inc., Austin, TX, USA
Volume
2
fYear
1995
fDate
13-16 Aug 1995
Firstpage
1135
Abstract
The PowerPC 604 microprocessor´s implementation is described including its superscalar dispatch, branch prediction, speculative execution, special instructions, and caches. An example is given showing that the 604 is well suited to multimedia applications
Keywords
microprocessor chips; multimedia computing; PowerPC 604 microprocessor; branch prediction; caches; multimedia applications; special instructions; speculative execution; superscalar dispatch; Decoding; Delay; Microprocessors; Out of order; Pipelines; Prefetching; System buses; System-on-a-chip; Throughput; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1995., Proceedings., Proceedings of the 38th Midwest Symposium on
Conference_Location
Rio de Janeiro
Print_ISBN
0-7803-2972-4
Type
conf
DOI
10.1109/MWSCAS.1995.510296
Filename
510296
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