Title :
An efficient VLSI architecture for new three-step search algorithm
Author :
He, Zhongli ; Lieu, M.L. ; Chan, Philip C.H. ; Li, R.
Author_Institution :
Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., Kowloon, Hong Kong
Abstract :
In this paper, we propose an efficient VLSI architecture for a new three-step search (NTSS) algorithm that is superior to the existing three-step search (TSS) algorithm. By appropriately organizing the checking points into checking-vectors, the regularity of data flow is exploited and the architecture based on 1-D systolic arrays is proposed. Because of the intrinsic characteristic of high-throughput, the proposed architecture can provide efficient solutions for a wide range of video applications
Keywords :
VLSI; data flow analysis; motion estimation; search problems; systolic arrays; 1D systolic array; VLSI architecture; checking vectors; data flow; motion estimation; new three-step search algorithm; video applications; Computer architecture; Costs; Hardware; Helium; Motion estimation; Organizing; Very large scale integration; Video compression; Video sequences; Videoconference;
Conference_Titel :
Circuits and Systems, 1995., Proceedings., Proceedings of the 38th Midwest Symposium on
Conference_Location :
Rio de Janeiro
Print_ISBN :
0-7803-2972-4
DOI :
10.1109/MWSCAS.1995.510317
