DocumentCode :
2209063
Title :
VLSI architectures for real-time moving image resampling
Author :
Naviner, L.A.deB.
Author_Institution :
Dept. de Engenharia Eletrica, Univ. Federal da Paraiba, Campina Grande
Volume :
2
fYear :
1995
fDate :
13-16 Aug 1995
Firstpage :
1260
Abstract :
This paper presents a solution for real-time image resampling, using dedicated VLSI architectures. The spatial image resampling algorithm is based on the use of two levels for the interpolation and relies on a tradeoff between storage and calculation of the filter coefficients, improving the performance-cost tradeoff of the hardware. Efficient motion compensated temporal resampling is carried out with a high performance motion estimation algorithm. Multiprediction, multiresolution and hierarchical approaches lead to an overall reduced computation power compared to classical block-matching algorithms
Keywords :
VLSI; image resolution; image sequences; interpolation; motion estimation; real-time systems; VLSI architectures; computation power; filter coefficients; hierarchical approaches; interpolation; motion compensated temporal resampling; motion estimation algorithm; multiprediction; multiresolution; performance-cost tradeoff; real-time moving image resampling; spatial image resampling algorithm; Filtering; Filters; Hardware; Image storage; Interpolation; Motion estimation; Sampling methods; Spatial resolution; Spline; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1995., Proceedings., Proceedings of the 38th Midwest Symposium on
Conference_Location :
Rio de Janeiro
Print_ISBN :
0-7803-2972-4
Type :
conf
DOI :
10.1109/MWSCAS.1995.510325
Filename :
510325
Link To Document :
بازگشت