A high level approach to design and implementation of real time low-level image processing operators

Author

De Barros, Marcelo Alves

Author_Institution

Dept. de Sistemas e Comput., Univ. Federal da Paraiba, Campina Grande, Brazil

Volume

2

fYear

1995

fDate

13-16 Aug 1995

Firstpage

1264

Abstract

This work describes a high level approach to design and hardware implementation of real time low level image processing (LLIP) operators. A description formalism is defined which is based on a modeling of LLIP applications on algorithmic, architectural and technological design levels. A library of LLIP primitives “premanufactured” using Xilinx FPGA (Field Programmable Gate Array) technology and a reference architectural model allows the user to design and to implement specific systems to real time applications

Keywords

data flow computing; field programmable gate arrays; image processing; pipeline processing; real-time systems; LLIP applications; Xilinx FPGA; description formalism; high level approach; real time low-level image processing operators; reference architectural model; technological design; Algorithm design and analysis; Application software; Computer architecture; Field programmable gate arrays; Hardware; Image processing; Parallel machines; Parallel processing; Random access memory; Software performance;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1995., Proceedings., Proceedings of the 38th Midwest Symposium on

Conference_Location

Rio de Janeiro

Print_ISBN

0-7803-2972-4

Type

conf

DOI

10.1109/MWSCAS.1995.510326

Filename

510326