• DocumentCode
    2209191
  • Title

    An algorithm for the design of a residue-to-binary converter

  • Author

    Hiasat, Ahmad A. ; Abdel-Aty-Zohdy, Hoda S.

  • Author_Institution
    Dept. of Electr. & Syst. Eng., Oakland Univ., Rochester, MI, USA
  • Volume
    2
  • fYear
    1995
  • fDate
    13-16 Aug 1995
  • Firstpage
    1280
  • Abstract
    This paper presents a new algorithm which converts moduli (2k , 2k-1, 2k-1-1) residue numbers to their binary equivalents. A suitable hardware implementation which utilizes binary adders, and needing no memory, is proposed. If the system is pipelined, then the throughput rate is that of a single (3k-1) bits adder. Thus, hardware requirements and execution time are less, with corresponding larger dynamic range
  • Keywords
    adders; convertors; pipeline arithmetic; residue number systems; algorithm; binary adder; design; dynamic range; execution time; hardware; moduli residue numbers; pipelined system; residue-to-binary converter; throughput rate; Adders; Algorithm design and analysis; Design engineering; Equations; Hardware; Laboratories; Microelectronics; Signal processing algorithms; Systems engineering and theory; Throughput;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1995., Proceedings., Proceedings of the 38th Midwest Symposium on
  • Conference_Location
    Rio de Janeiro
  • Print_ISBN
    0-7803-2972-4
  • Type

    conf

  • DOI
    10.1109/MWSCAS.1995.510330
  • Filename
    510330