Title :
Low power, high precision and reduced size CMOS Comparator for high speed ADC design
Author :
Nag, Amalan ; Baishnab, K.L. ; Talukdar, F.A.
Author_Institution :
Dept. of Electron. & Commun. Eng., NIT Silchar, Silchar, India
fDate :
July 29 2010-Aug. 1 2010
Abstract :
In this paper a low power CMOS Comparator is proposed which is very well capable of distinguishing DC voltage difference of around even 0.2 mV. By providing excitory feedback, the proposed compact circuit is made to successfully avoid the need of a post amplifier or any other cascading stages. The circuit can also operate at a wide range of power supply starting from 1.1 V with a clock frequency of 200MHz. Some trade off between precision and resolution are vividly discussed to get a better understanding of the circuit behavior. The simulated results are shown which are done in CADANCE gpdk-90 technology.
Keywords :
CMOS integrated circuits; amplifiers; analogue-digital conversion; comparators (circuits); integrated circuit design; low-power electronics; CADANCE gpdk-90 technology; DC voltage difference; cascading stages; compact circuit; excitory feedback; frequency 200 MHz; high speed ADC design; low power CMOS comparator; post amplifier; voltage 1.1 V; CMOS integrated circuits; CMOS technology; Clocks; Information systems; Integrated circuit modeling; Logic gates; Solid state circuit design; CMOS Comparator; Low Power; excitory feedback; high speed; wide supply voltage range;
Conference_Titel :
Industrial and Information Systems (ICIIS), 2010 International Conference on
Conference_Location :
Mangalore
Print_ISBN :
978-1-4244-6651-1
DOI :
10.1109/ICIINFS.2010.5578706
