Single polysilicon layer advanced super high-speed BiCMOS technology

Author

de Jong, J.L. ; Lane, Richard ; van Schravendijk, B. ; Conner, George

Author_Institution

Signetics Co., Sunnyvale, CA, USA

fYear

1989

fDate

18-19 Sep 1989

Firstpage

182

Lastpage

185

Abstract

A single-polysilicon-layer advanced super-high-speed (HS4+) BiCMOS technology which offers 1-μm NMOS and PMOS devices, 13-GHz bipolar npn transistors, lateral pnps, Schottky diodes, polysilicon resistors, lateral fuses, and three layers of Al/Cu interconnect is presented. The key processing steps and the resulting device characteristics are examined with an emphasis on the manufacturability of this technology. The bipolar transistor and CMOS device reliability is discussed

Keywords

BIMOS integrated circuits; integrated circuit technology; reliability; 1 micron; 13 GHz; Al-Cu interconnect; CMOS device; HS4+; Schottky diodes; advanced super high-speed BiCMOS technology; bipolar npn transistors; bipolar transistor; characteristics; device characteristics; key processing steps; lateral fuses; lateral pnps; manufacturability; polycrystalline Si layer; polysilicon resistors; reliability; single-polysilicon-layer; three layer interconnect; three layer metallisation; BiCMOS integrated circuits; Bipolar transistors; CMOS process; CMOS technology; Implants; Resistors; Schottky diodes; Silicon; Substrates; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Bipolar Circuits and Technology Meeting, 1989., Proceedings of the 1989

Conference_Location

Minneapolis, MN

Type

conf

DOI

10.1109/BIPOL.1989.69487

Filename

69487