DocumentCode
2209534
Title
A Study on RF Transistor Implementations on a 0.25 μm Digital CMOS Process
Author
Mangaser, Jose Enrico R ; Gutierrez, Maria Cecilia N ; Hizon, John Richard E ; Alarcon, Louis P.
Author_Institution
Dept. of Electr. & Electron. Eng., Univ. of Philippines, Quezon City
fYear
2006
fDate
14-17 Nov. 2006
Firstpage
1
Lastpage
4
Abstract
Modeling MOSFET parasitics is vital as the operating frequency increases and enters the GHz range. To improve RF design capability, several common source NMOS transistors were implemented on a 0.25 μm digital CMOS process using various layout techniques described in literature. Relevant parasitics were then extracted and compared to identify the techniques that would maximize transistor performance for RF applications
Keywords
CMOS digital integrated circuits; MOSFET; radiofrequency integrated circuits; 0.25 micron; MOSFET parasitics; NMOS transistor; RF transistor; digital CMOS process; layout techniques; metal-oxide-semiconductor field effect transistor; CMOS process; CMOS technology; Circuit simulation; Equivalent circuits; Integrated circuit technology; MOSFET circuits; Predictive models; Radio frequency; Semiconductor device modeling; Space technology;
fLanguage
English
Publisher
ieee
Conference_Titel
TENCON 2006. 2006 IEEE Region 10 Conference
Conference_Location
Hong Kong
Print_ISBN
1-4244-0548-3
Electronic_ISBN
1-4244-0549-1
Type
conf
DOI
10.1109/TENCON.2006.344151
Filename
4142620
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