DocumentCode :
2209715
Title :
High-performance crest factor reduction processor for W-CDMA and OFDM applications
Author :
Wegener, A.
Author_Institution :
Texas Instruments, Palo Alto, CA
fYear :
2006
fDate :
11-13 June 2006
Abstract :
Highly linear wideband power amplifiers (PAs) are needed for code division multiple access (CDMA) and orthogonal frequency division multiplex (OFDM) modulations. Such PAs normally have low operating efficiency because of the high peak-to-average ratio (PAR) of CDMA and OFDM signals. By reducing the PAR of CDMA and OFDM signals, both PA acquisition and operating costs are decreased. We describe the GC1115 crest factor reduction processor, a 1.8M gate device fabricated in 130 nm CMOS process that operates at input and output sample rates up to 130 Msamp/sec. The GC1115 decreases the PAR of W-CDMA test model signals to 5.7 dB while meeting all signal quality requirements of 3GPP TS 25.141. The GC1115 achieves similar PAR improvement on OFDM signals
Keywords :
CMOS analogue integrated circuits; OFDM modulation; code division multiple access; power amplifiers; wideband amplifiers; 130 nm; CDMA signals; OFDM applications; OFDM modulations; OFDM signals; W-CDMA applications; code division multiple access; crest factor reduction processor; linear wideband power amplifiers; orthogonal frequency division multiplex; Broadband amplifiers; CMOS process; Chirp modulation; Costs; Frequency division multiplexing; High power amplifiers; Modulation coding; Multiaccess communication; OFDM modulation; Peak to average power ratio;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Radio Frequency Integrated Circuits (RFIC) Symposium, 2006 IEEE
Conference_Location :
San Francisco, CA
Print_ISBN :
0-7803-9572-7
Type :
conf
DOI :
10.1109/RFIC.2006.1651119
Filename :
1651119
Link To Document :
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