• DocumentCode
    2209832
  • Title

    Evaluating order of circuits for deadlock avoidance in a flexible manufacturing system

  • Author

    Zhang, Wenle ; Judd, Robert P. ; Deering, Paul E.

  • Author_Institution
    Sch. of Electr. Eng. & Comput. Sci., Ohio Univ., Athens, OH, USA
  • Volume
    5
  • fYear
    2003
  • fDate
    4-6 June 2003
  • Firstpage
    3679
  • Abstract
    Circuits and knots in the diagraph model of a manufacturing system are the rudimentary causes of deadlocks - a type of deadlock that is difficult to detect. A new deadlock avoidance algorithm that dynamically evaluates the order of circuits is presented. The algorithm is highly permissive since the order evaluation captures more parts flow dynamics, especially when there exist multiple knots in the diagraph model. It also runs in polynomial time once the set of circuits of the diagraph is given. Simulation results are provided to illustrate the application of the algorithm.
  • Keywords
    concurrency control; directed graphs; flexible manufacturing systems; circuit order; deadlock avoidance; diagraph model; flexible manufacturing system; flow dynamics; order evaluation; polynomial time; Algorithm design and analysis; Circuit simulation; Computer science; Flexible manufacturing systems; Flexible printed circuits; Heuristic algorithms; Manufacturing systems; Polynomials; Sufficient conditions; System recovery;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    American Control Conference, 2003. Proceedings of the 2003
  • ISSN
    0743-1619
  • Print_ISBN
    0-7803-7896-2
  • Type

    conf

  • DOI
    10.1109/ACC.2003.1240405
  • Filename
    1240405