Title :
Synthesis of reusable DSP cores based on multiple behaviors
Author :
Wei Zhao ; Papachristou, C.A.
Author_Institution :
Dept. of Comput. Eng., Case Western Reserve Univ., Cleveland, OH, USA
Abstract :
Design with cores has become popular recently because it can decrease the design time and ease the complexity of the design process. This paper presents a new method for the design of DSP cores based on multiple behaviors. This method uses redesign technique based on reallocation transformations to extract those RTL components in an initial RTL structure which are highly reusable and uses them to construct a DSP core. Experimental results are provided to illustrate the high reusability of core, extracted from given behaviors, when it accommodates new behaviors.
Keywords :
digital signal processing chips; high level synthesis; logic CAD; RTL components; RTL structure; design process complexity; design time; multiple behaviors; reusable DSP cores synthesis; Costs; Design engineering; Design methodology; Digital signal processing; Frequency; Kernel; Process design; Resource management; System testing; Very large scale integration;
Conference_Titel :
Computer-Aided Design, 1996. ICCAD-96. Digest of Technical Papers., 1996 IEEE/ACM International Conference on
Conference_Location :
San Jose, CA, USA
Print_ISBN :
0-8186-7597-7
DOI :
10.1109/ICCAD.1996.569408