DocumentCode :
2210723
Title :
Throughput and latency analysis of the Spidergon-Donut interconnection network
Author :
Sibai, F.N. ; El-Moursy, A. ; Mohamed, N.
Author_Institution :
R&D Center, Saudi Aramco, Dhahran, Saudi Arabia
fYear :
2012
fDate :
18-20 March 2012
Firstpage :
356
Lastpage :
360
Abstract :
The Spidergon-Donut on-chip interconnection network was proposed to interconnect the cores of a 1000+ core chip. In this paper, we derive a queueing model for the Spidergon-Donut, and analyze its throughput and latency in comparison with the commercial Spidergon network on which it is based. Results indicate that the Spidergon-Donut throughput is 3-5 times larger than that of the Spidergon network, for 32-4096 cores and the Spidergon-Donut significantly outperforms the Spidergon in network latency under moderate to large traffic rates. Furthermore, for 1K cores, the average distance of the Spidergon-Donut is one tenth that of the Spidergon.
Keywords :
multiprocessor interconnection networks; network-on-chip; queueing theory; Spidergon-Donut on-chip interconnection network; latency analysis; queueing model; throughput analysis; traffic rates; Analytical models; Bandwidth; Multiprocessor interconnection; Real time systems; System-on-a-chip; Throughput; Spidergon network; Spidergon-Donut network; on-chip interconnection networks; queueing model;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Innovations in Information Technology (IIT), 2012 International Conference on
Conference_Location :
Abu Dhabi
Print_ISBN :
978-1-4673-1100-7
Type :
conf
DOI :
10.1109/INNOVATIONS.2012.6207767
Filename :
6207767
Link To Document :
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