Abstract :
Notice of Violation of IEEE Publication Principles
"A 9.953-12.5GHz 0.13 μm Standard CMOS Bondwire LC Oscillator Using a Resistor-Tuned Varactor and a Low-Noise Dual-Regulator"
by Maxim, A.; Turinici, C.;
in the Proceedings of the IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006
After careful and considered review, it has been determined that the above paper is in violation of IEEE\´s Publication Principles.
Specifically, the coauthor\´s name was fabricated by Adrian Maxim and added to the paper. In response to an inquiry on this misconduct, Mr. Maxim acknowledged that the following people who have been listed as co-authors on several of his papers are fabricated names and that he is the only author:
C. Turinici, D. Smith, S. Dupue, M. Gheorge, R. Johns, D. Antrik
Additionally, in papers by Mr. Maxim that have co-authors other than those listed above, it was discovered in some cases that he had not consulted with them while writing the papers, and submitted papers without their knowledge.
Although Mr. Maxim maintains that not all of the data is falsified, IEEE nevertheless cannot assure the integrity of papers posted by him because of his repeated false statements.
Due to the nature of this violation, reasonable effort should be made to remove all past references to the above paper, and to refrain from any future references.A multi-standard LC oscillator for 10Gb/s SERDES applications was realized in a 0.13mum digital CMOS process. The phase noise was reduced by using a high quality factor bondwire inductor in conjunction with a high resolution calibration network that brings the oscillating frequency to within 0.1% of the target value, reducing thus the oscillator gain below 100MHz/V. A high quality factor varactor was realized with constant metal capacitors and voltage controlled resistors achieving a gain ripple less than 10%. The supply pushing was minimized by cancelling the gate ca- acitance positive voltage coefficient with the negative coefficient of an appropriately sized drain diffusion capacitance. A dual regulator was used to ensure the low noise and high PSRR VCO supply requirements
Keywords :
CMOS digital integrated circuits; Q-factor; inductors; microwave oscillators; phase noise; varactors; voltage-controlled oscillators; 0.13 micron; 10 Gbit/s; 9.953 to 12.5 GHz; CMOS bondwire LC oscillator; SERDES applications; bondwire inductor; digital CMOS process; drain diffusion capacitance; high quality factor varactor; high resolution calibration network; low-noise dual-regulator; metal capacitors; negative coefficient; phase noise was; resistor-tuned varactor; voltage controlled resistors; Bonding; CMOS process; Capacitance; Notice of Violation; Q factor; Radiofrequency integrated circuits; Varactors; Voltage-controlled oscillators;
