Fast arithmetic and fault tolerance in the FERMI system

Author

Breveglieri, Luca ; Dadda, Luigi ; Piuri, Vincenzo

Author_Institution

Dipartimento di Elettronica e Inf., Politecnico di Milano, Italy

fYear

1997

fDate

14-16 Jul 1997

Firstpage

374

Lastpage

383

Abstract

The FERMI is a data acquisition system for calorimetry experiments in high energy physics at the LHC, CERN. The system contains a large number of acquisition channels, with a precision of 16 bits and a sampling rate of 40 MHz. A large part of the information driven by the channels is processed locally, to reduce the amount of data. This requires to cluster several channels by adding them. The paper presents the design of a fast, low cost adder chip, based on the implementation of column compression techniques for the computation of integer addition. Since the system is operating in a radiation-hard environment, fault tolerance (namely fault detection) is implemented by means of arithmetic codes

Keywords

arithmetic codes; calorimetry; data acquisition; digital arithmetic; fault tolerant computing; high energy physics instrumentation computing; FERMI system; acquisition channels; arithmetic codes; calorimetry experiments; column compression techniques; data acquisition system; fast arithmetic; fault detection; fault tolerance; high energy physics; integer addition; low cost adder chip; radiation-hard environment; Arithmetic; Calorimetry; Costs; Data acquisition; Fault detection; Fault tolerance; Fault tolerant systems; Large Hadron Collider; Sampling methods; Silicon;

fLanguage

English

Publisher

ieee

Conference_Titel

Application-Specific Systems, Architectures and Processors, 1997. Proceedings., IEEE International Conference on

Conference_Location

Zurich

ISSN

2160-0511

Print_ISBN

0-8186-7959-X

Type

conf

DOI

10.1109/ASAP.1997.606842

Filename

606842