Title :
A unified modeling and design methodology for RFICs using parameterized sub-circuit cells
Author :
Shin, Dong Hun ; Yue, C. Patrick
Author_Institution :
Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA
Abstract :
This paper presents, for the first time, a cell-based modeling and design platform for RFICs aiming to shorten design cycle time by eliminating iterations between schematic and post-layout simulations and to minimize the risk for costly mask re-spin. Based on a pre-characterized RF sub-circuit cell library, which contains not only active devices and passive components but also routing interconnects, this methodology systematically alleviates the common RF model inaccuracy due to layout discrepancies between actual circuits and device model test structures. By exploiting the modularity in RF circuits at the sub-circuit level, the proposed design platform achieves a balance between circuit design flexibility and device model accuracy compared to the conventional approach of using pre-characterizing single transistors. This paper describes the implementation of the parameterized sub-circuit cell layout and the macro modeling techniques for a 0.13-mum CMOS RF sub-circuit cell library. Measurement results from a characterization test chip for validating the macro circuit models are presented
Keywords :
CMOS integrated circuits; integrated circuit interconnections; integrated circuit layout; integrated circuit modelling; radiofrequency integrated circuits; 0.13 micron; CMOS RF sub-circuit cell library; RF circuits; RFIC; cell-based modeling; design cycle time; macro circuit models; macro modeling techniques; parameterized sub-circuit cell layout; parameterized sub-circuit cells; pre-characterizing single transistors; Circuit simulation; Circuit testing; Design methodology; Integrated circuit interconnections; Libraries; Radio frequency; Radiofrequency integrated circuits; Routing; Semiconductor device modeling; System testing;
Conference_Titel :
Radio Frequency Integrated Circuits (RFIC) Symposium, 2006 IEEE
Conference_Location :
San Francisco, CA
Print_ISBN :
0-7803-9572-7
DOI :
10.1109/RFIC.2006.1651168