A simple snubber configuration for three level voltage source GTO inverters

The authors have proposed a snubber circuit for three level GTO inverters extending the result of the half bridge snubber circuit for two level inverters. The proposed snubber configuration consisting of a center-tapped inductor, a resistor, two diodes, and four capacitors for each arm, minimizes the number of circuit elements so that it has a great advantage over the classical RCD/RLD snubber in the perspective of manufacturing cost, inverter size, and maintenance. Its performance is demonstrated through computer simulations and experiments