Title :
Nano-CMOS scaling: Novel devices and materials
Author_Institution :
IBM Semicond. Res. & Dev. Center, Yorktown Heights
Abstract :
This paper will review recent progress of innovative devices and materials for nano-CMOS technology. This paper will discuss (1) various mobility enhancement techniques for faster carrier, (2) new materials and structures for device scaling, and (3) novel contact and silicide technology for parasitic resistance reduction.
Keywords :
CMOS integrated circuits; nanotechnology; contact technology; device scaling; faster carrier; mobility enhancement techniques; nanoCMOS scaling; parasitic resistance reduction; silicide technology; CMOS technology; Capacitive sensors; Dielectric materials; Dielectric substrates; Electrodes; MOSFETs; Nanoscale devices; Silicides; Space technology; Threshold voltage; CMOS; Device scaling; Orientationeffects; parasitic resistance; strained-silicon;
Conference_Titel :
Nanotechnology Materials and Devices Conference, 2006. NMDC 2006. IEEE
Conference_Location :
Gyeongju
Print_ISBN :
978-1-4244-0541-1
Electronic_ISBN :
978-1-4244-0541-1
DOI :
10.1109/NMDC.2006.4388702
