DocumentCode
2211830
Title
A +7.9dBm IIP3 LNA for CDMA2000 in a 90nm digital CMOS process
Author
Griffith, Danielle
Author_Institution
Texas Instruments, Dallas, TX
fYear
2006
fDate
11-13 June 2006
Abstract
A highly linear low noise amplifier (LNA) has been implemented in a standard digital 90nm CMOS process. At 880MHz the amplifier provides a forward power gain (S21) of 14.5dB with a supply voltage of 1.4V and a current consumption of 8.3mA. The noise figure was measured to be 1.0dB and the input third order intercept point (IP3) is +7.9dBm. Two lower gain modes have also been implemented; one with a lower transconductance gain stage, and one with a bypass switch. These performance parameters make the amplifier suited for the CDMA2000 cellular standard
Keywords
3G mobile communication; CMOS integrated circuits; UHF amplifiers; UHF integrated circuits; intermodulation distortion; low noise amplifiers; 1.0 dB; 1.4 V; 14.5 dB; 8.3 mA; 880 MHz; 90 nm; CDMA2000 cellular standard; bypass switch; code division multiple access; cross modulation distortion; digital CMOS process; intermodulation distortion; low noise amplifiers; CMOS process; Frequency; Intermodulation distortion; Jamming; Low-noise amplifiers; Microwave amplifiers; Mobile handsets; Noise figure; Peak to average power ratio; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Radio Frequency Integrated Circuits (RFIC) Symposium, 2006 IEEE
Conference_Location
San Francisco, CA
Print_ISBN
0-7803-9572-7
Type
conf
DOI
10.1109/RFIC.2006.1651201
Filename
1651201
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