An evaluation of code generation strategies targeting hardware for the rapid prototyping of SDL specifications

The specification of an embedded system at the system level, together with co-joint hardware/software synthesis, is a goal of many rapid prototyping projects. SDL has been proposed as a formal and abstract specification language that is well-suited for this purpose. In the automated generation of hardware, however, SDL´s asynchronous communication model (directly implemented in the so-called server model) can lead to large overheads in area and response time. The activity thread implementation model, on the other hand, is more similar to hardware description language concepts, with respect to its execution in hardware, due to its synchronous communication and execution scheme. This paper compares VHDL code generation from SDL using these two models, with regard to their implementation architectures, resource usage, throughput and response time. The integration in an existing rapid prototyping design process is presented, as well as results gained from several application examples