DocumentCode
2213551
Title
A mixed-signal decision-feedback equalizer that uses parallelism
Author
Kajley, Ravinder S. ; Brown, James E C ; Hurst, Paul J.
Author_Institution
Dept. of Electr. & Comput. Eng., California Univ., Davis, CA, USA
fYear
1996
fDate
5-8 May 1996
Firstpage
17
Lastpage
20
Abstract
A mixed-signal decision-feedback equalizer (DFE) that uses parallelism is described. The parallelism in the look-ahead DFE achieves an increase in the data rate over that of a conventional DFE. The DFE occupies 23 mm2 in a 2-μm CMOS process, operates at 55 Mb/s and dissipates 450 mW
Keywords
CMOS integrated circuits; decision feedback equalisers; hard discs; integrated circuit design; mixed analogue-digital integrated circuits; 2 micron; 450 mW; 55 Mbit/s; CMOS process; data rate; look-ahead DFE; mixed-signal decision-feedback equalizer; parallelism; power dissipation; CMOS process; Communication channels; Decision feedback equalizers; Detectors; Intersymbol interference; Laboratories; Parallel processing; Sampling methods; Solid state circuits; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 1996., Proceedings of the IEEE 1996
Conference_Location
San Diego, CA
Print_ISBN
0-7803-3117-6
Type
conf
DOI
10.1109/CICC.1996.510503
Filename
510503
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