Buffer management in a hierarchical shared memory switch

Studies a multistage hierarchical ATM switch in which each switching component has its own local cell buffer memory that is shared among all its output ports. The authors propose a novel buffer management technique called “delayed pushout” that combines a pushout mechanism, for sharing memory efficiently among queues within the same switching component, and a backpressure mechanism, for sharing memory across switch stages. The backpressure component has a threshold to restrict the amount of sharing between stages. A synergy emerges when pushout, backpressure, and this threshold are all employed together. Using a computer simulation of the switch under bursty traffic, the authors study delayed pushout as well as several simpler pushout and backpressure schemes under a wide range of loads. At every load level, they find that the delayed pushout scheme has a lower cell loss rate than its competitors. Finally, they show how delayed pushout can be extended to share buffer space between traffic classes with different space priorities