DocumentCode :
2213859
Title :
Sum of Absolute Difference Implementations for Image Processing on FPGAs
Author :
Niitsuma, Hiroaki ; Maruyama, Tsutomu
Author_Institution :
Syst. & Inf. Eng., Univ. of Tsukuba, Tsukuba, Japan
fYear :
2010
fDate :
Aug. 31 2010-Sept. 2 2010
Firstpage :
167
Lastpage :
170
Abstract :
SAD (sum of absolute differences) is a technique for evaluating the similarity between two same size regions, and widely used in stereovision, optical flow, motion estimation and so on. In these applications, a given image is scanned using a fixed size region (window), and the window is compared with the same size regions in another image. When the window is overlapped for generating a dense map, we have several implementation alternatives; storing the partial sums for reusing them afterward or recalculating them when they become necessary, scanning left to right or top to bottom, and dividing the search space horizontally or vertically. With the combination of these alternatives, we can implement a wide range of circuits. In this paper, we evaluate the performance and the size of those circuits, and makes it clear which circuit fits which type of FPGA.
Keywords :
field programmable gate arrays; image processing; image scanners; user interfaces; FPGA; SAD; absolute difference implementation; fixed size region; image processing; motion estimation; optical flow; search space; stereo vision; FPGA; SAD; image processing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field Programmable Logic and Applications (FPL), 2010 International Conference on
Conference_Location :
Milano
ISSN :
1946-1488
Print_ISBN :
978-1-4244-7842-2
Type :
conf
DOI :
10.1109/FPL.2010.40
Filename :
5694240
Link To Document :
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