• DocumentCode
    2214098
  • Title

    A Triple Hybrid Interconnect for Many-Cores: Reconfigurable Mesh, NoC and Barrier

  • Author

    Giefers, Heiner ; Platzner, Marco

  • Author_Institution
    Univ. of Paderborn, Paderborn, Germany
  • fYear
    2010
  • fDate
    Aug. 31 2010-Sept. 2 2010
  • Firstpage
    223
  • Lastpage
    228
  • Abstract
    Networks-on-chip (NoC) are very efficient for point-to-point communication but are also known to provide poor broadcast and multicast performance. In this paper, we propose a triple hybrid interconnect for many-cores, consisting of a reconfigurable mesh network and a wormhole routed NoC for data communication, and a barrier network for synchronization. On an FPGA many-core prototype comprising up to 30 Microblaze soft cores we show that the reconfigurable mesh network excels for multicast and broadcast operations, while the NoC performs better for larger messages and more dynamic workloads. Experiments with a parallel Jacobi algorithm demonstrate that the combined use of all three networks delivers the highest performance.
  • Keywords
    Jacobian matrices; data communication; field programmable gate arrays; multiprocessing systems; multiprocessor interconnection networks; network-on-chip; synchronisation; Jacobi algorithm; Microblaze soft cores; barrier network; data communication; networks on chip; point to point communication; reconfigurable mesh; reconfigurable mesh network; triple hybrid interconnect; wormhole routed NoC;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Field Programmable Logic and Applications (FPL), 2010 International Conference on
  • Conference_Location
    Milano
  • ISSN
    1946-1488
  • Print_ISBN
    978-1-4244-7842-2
  • Type

    conf

  • DOI
    10.1109/FPL.2010.52
  • Filename
    5694251