DocumentCode
2214164
Title
Efficient clock-cycle precise simulation at architecture level in C++
Author
Eggers, Goran ; Zeidler, Hans Christoph
Author_Institution
Tech. Inf., Univ. der Bundeswehr, Hamburg, Germany
fYear
2000
fDate
2000
Firstpage
222
Lastpage
227
Abstract
Typically the design of hardware and software for embedded systems is tightly coupled. In combination, hardware and software have to fulfil the specific requirements of a particular application. This represents a challenge and opportunity in order to look for a balanced solution between both parts. A fast simulator with adequate interfaces is able to support this desire based on experiments starting early during the design process. This paper presents SEARS, a high level simulation written in C++ which is fast enough to run real-world programs on simulated hardware and, nevertheless, generates sufficient time information to measure program execution time precisely. The simulator provides configuration layers for increased flexibility and an interface with familiar parts for both the hardware and the software engineer
Keywords
embedded systems; hardware-software codesign; virtual machines; C++; SEARS; architecture level; configuration layers; efficient clock-cycle precise simulation; embedded systems; fast simulator; hardware design; high level simulation; interfaces; program execution time measurement; software design; time information; Clocks; Design engineering; Embedded software; Embedded system; Hardware; Microprocessors; Power system reliability; Process design; Real time systems; Semiconductor device measurement;
fLanguage
English
Publisher
ieee
Conference_Titel
Rapid System Prototyping, 2000. RSP 2000. Proceedings. 11th International Workshop on
Conference_Location
Paris
ISSN
1074-6005
Print_ISBN
0-7695-0668-2
Type
conf
DOI
10.1109/IWRSP.2000.855239
Filename
855239
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