A Monte-Carlo approach for the accurate and efficient estimation of average transition probabilities in sequential logic circuits

Author

Stamoulis, Georgios I.

Author_Institution

Intel Corp., Santa Clara, CA, USA

fYear

1996

fDate

5-8 May 1996

Firstpage

221

Lastpage

224

Abstract

This paper presents an efficient and accurate Monte-Carlo approach to the problem of estimating average node switching probabilities in sequential circuits which are used in average power estimation and reliability analysis of these circuits. Specific error bounds for the proposed estimation method are given at a certain level of confidence. This method is based on the analysis of paths in the State Transition Graph (STG) of the circuit and is validated by both theoretical analysis as well as experimental results

Keywords

Monte Carlo methods; VLSI; circuit analysis computing; fault diagnosis; graph theory; integrated circuit reliability; logic testing; probability; sequential circuits; Monte-Carlo approach; VLSI; average transition probabilities; circuit simulation; error bounds; node switching probabilities; power estimation; reliability analysis; sequential logic circuits; state transition graph; Circuit analysis; Circuit simulation; Combinational circuits; Degradation; Educational institutions; Latches; Power dissipation; Probabilistic logic; Sequential circuits; Switching circuits;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 1996., Proceedings of the IEEE 1996

Conference_Location

San Diego, CA

Print_ISBN

0-7803-3117-6

Type

conf

DOI

10.1109/CICC.1996.510547

Filename

510547