Improved performance of multi-giga bit NAND flash using <100> channel orientation

Author

Cho, Hye Jin ; Choi, Byung Young ; Kang, Hee Soo ; Sung, Suk-Kang ; Tae Hun Kim ; Cho, Byung Kyu ; Choi, Donguk ; Fayrushin, Albert ; Lim, Jong Ho ; Lee, Ji-Hwon ; Kim, Andrew T. ; Hong-Shik Kim ; Jung, In Sun ; Roh, Yonghan ; Lee, Choong-Ho ; Park, Kyuch

Author_Institution

Device Res. Team, Samsung Electron. Co., Ltd., Yongin

Volume

1

fYear

2006

fDate

22-25 Oct. 2006

Firstpage

210

Lastpage

211

Abstract

In this paper, we report the enhanced performance of multi-giga bit NAND flash memory through the combined effects of uniaxial compressive stress and <100>-oriented channel engineering. Using this method, cell current increased more than 29% owing to the mobility enhancement of the narrow width (60 nm) flash cell. Reduced interface trap with the active edge of <100> channel resulted in the endurance characteristic improvement ~5%.

Keywords

NAND circuits; flash memories; channel orientation engineering; interface trap; mobility enhancement; multigiga bit NAND flash memory; size 60 nm; uniaxial compressive stress; Area measurement; Charge pumps; Compressive stress; Current measurement; Degradation; Density measurement; Electric variables; Reliability engineering; Sun; Tensile stress; <100>; chennel orientation; flash cell; reliabilty;

fLanguage

English

Publisher

ieee

Conference_Titel

Nanotechnology Materials and Devices Conference, 2006. NMDC 2006. IEEE

Conference_Location

Gyeongju

Print_ISBN

978-1-4244-0540-4

Electronic_ISBN

978-1-4244-0541-1

Type

conf

DOI

10.1109/NMDC.2006.4388843

Filename

4388843