Capacitive coupling and quantized feedback applied to conventional CMOS technology

Author

Gabara, Thaddeus ; Fischer, Wilhlem

Author_Institution

AT&T Bell Labs., Murray Hill, NJ, USA

fYear

1996

fDate

5-8 May 1996

Firstpage

281

Lastpage

284

Abstract

An on-chip capacitor which is formed under a bonding pad is used to block the DC level of an external input signal. Quantized feedback using a self-triggered decision circuit is used to establish local DC voltage levels in the receiver and eliminate the “zero wander” effect. Measurement of a 0.5 μm CMOS chip has demonstrated that: a BER (Bit Error Rate) test for a 2³¹-1 sequence showed no errors at 600 Mb/s; the circuit detected a low frequency signal of 1 Kb/s indicating that coding is not required; and the input signal can be DC biased anywhere, limited only by the ESD diodes, between VDD and VSS without affecting the final recovered CMOS waveform

Keywords

CMOS digital integrated circuits; capacitance; circuit feedback; error statistics; integrated circuit technology; 0.5 micron; 600 Mbit/s; BER test; CMOS technology; bit error rate; capacitive coupling; local DC voltage levels; onchip capacitor; quantized feedback; self-triggered decision circuit; Bit error rate; Bonding; Capacitors; Circuit testing; Coupling circuits; Electrostatic discharge; Feedback circuits; Frequency measurement; Semiconductor device measurement; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 1996., Proceedings of the IEEE 1996

Conference_Location

San Diego, CA

Print_ISBN

0-7803-3117-6

Type

conf

DOI

10.1109/CICC.1996.510559

Filename

510559