Title :
Degradation Analysis and Mitigation in FPGAs
Author :
Stott, Edward ; Wong, Justin S J ; Cheung, Peter Y K
Author_Institution :
Dept. of Electr. & Electron. Eng., Coll. London, London, UK
fDate :
Aug. 31 2010-Sept. 2 2010
Abstract :
FPGAs are powerful platforms for investigating impending challenges associated with process scaling, such as variation and degradation. Their versatility allows us to gather empirical data and evaluate novel solutions. We carried out accelerated-life tests on modern FPGA devices and obtained a useful characterisation of the ageing processes that afflict them. We also quantified the potential benefits of three degradation mitigation strategies based on exploiting spare logic and interconnect resources. The work helps cement the role of reconfigurable logic as a vitally-important technology in the face of the uncertainties of future process scaling.
Keywords :
circuit testing; field programmable gate arrays; scaling circuits; accelerated life tests; ageing processes; degradation mitigation strategies; exploiting spare logic; interconnect resources; modern FPGA devices; process scaling; reconfigurable logic; FPGA; Fault-tolerance; NBTI; reliability; self-test;
Conference_Titel :
Field Programmable Logic and Applications (FPL), 2010 International Conference on
Conference_Location :
Milano
Print_ISBN :
978-1-4244-7842-2
DOI :
10.1109/FPL.2010.88