DocumentCode
2215348
Title
Nanocomputing with delays
Author
Fortes, José A B
Author_Institution
Dept. of Electr. & Comput. Eng., Florida Univ., Gainesville, FL, USA
fYear
2002
fDate
2002
Firstpage
3
Lastpage
4
Abstract
The push to obtain smaller and denser circuits solely based on lithography and silicon technology is quickly reaching limits imposed by device physics and processing technology. It is anticipated that these limits will invalidate Moore´s law and lead to unacceptable manufacturing costs, unreliable devices, and hard-to-manage power dissipation and interconnect problems. Nanotechnologies that rely on self-assembly, biomolecular components, and nanoelectronics are promising alternatives to silicon-based microelectronics. They will eventually enable levels of integration that exceed that of today´s silicon-based microelectronics by three orders of magnitude. These nascent technologies present intriguing challenges and exciting opportunities to use biologically inspired solutions to address system architecture questions. This paper discusses recent results of an ongoing collaborative research effort by nanotechnologists, neurocomputing experts, and computer and circuit designers to explore novel architectures for nanoscale neuromorphic systems. The focus is placed on implementations whose behavior depends on how propagation delays affect communication among system components. The components under consideration are reminiscent of spiking neurons and, unlike in classical systems, interconnect is used for computation as well as communication purposes. Hybrid systems are also briefly discussed.
Keywords
delays; integrated circuit interconnections; nanoelectronics; neural chips; neural net architecture; self-assembly; Moore´s law; biologically inspired solutions; biomolecular components; circuit design; collaborative research; computer design; device physics; device processing technology limits; hybrid systems; integration levels; interconnect communication; interconnect computation; interconnect problems; lithography; manufacturing costs; nanocomputing; nanoelectronics; nanoscale neuromorphic systems; nanotechnology; neurocomputing; power dissipation; propagation delays; self-assembly; silicon technology; silicon-based microelectronics; small dense circuits; spiking neurons; system architecture; system component communication; unreliable devices; Computer architecture; Delay; Integrated circuit interconnections; Lithography; Manufacturing; Microelectronics; Moore´s Law; Nanobioscience; Physics; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Application-Specific Systems, Architectures and Processors, 2002. Proceedings. The IEEE International Conference on
ISSN
2160-0511
Print_ISBN
0-7695-1712-9
Type
conf
DOI
10.1109/ASAP.2002.1030699
Filename
1030699
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