Complete mixed-signal building blocks for single-chip GSM baseband processing

This paper presents a complete set of mixed-signal building blocks for implementing a single-chip GSM baseband signal processor as an ASIC or ASSP. Implemented in a 0.35 μm digital CMOS process, the blocks include a 10 bit baseband codec, a 13 bit voiceband codec, ancillary 10 bit DAC´s and 8 bit ADC, 32 kHz oscillator, and PLL. The total active area is 17 sq. mm, while the current consumption is 33 mA when all blocks are operating at 3 V. One of the key technical IC implementation challenges is the integration of mixed-signal circuits in a digital CMOS process. Using the GSM receiver design as an example, various techniques for overcoming coupling noise and the lack of precision passive components are presented