An energy conscious methodology for early design exploration of heterogeneous DSPs

Author

Wan, Marlene ; Ichikawa, Yuji ; Lidsky, David ; Rabaey, Jan

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA

fYear

1998

fDate

11-14 May 1998

Firstpage

111

Lastpage

117

Abstract

In this paper, we introduce an energy-conscious methodology to guide algorithm partitioning and mapping of embedded DSP applications onto heterogeneous architecture components. The methodology supports both realistic algorithm-architecture (simultaneous optimization at different abstraction levels) as well as hardware-software co-design (optimization over various architectural alternatives). Macro-model based predictors are used to provide early feedback on the impact of design selections and partitions. A case study is presented to demonstrate the methodology flow

Keywords

digital signal processing chips; embedded systems; hardware-software codesign; integrated circuit design; algorithm partitioning; design exploration; design selections; embedded DSP applications; energy conscious methodology; hardware-software co-design; heterogeneous DSPs; macromodel based predictors; methodology flow; realistic algorithm-architecture; Computer architecture; Design methodology; Design optimization; Digital signal processing; Embedded computing; Embedded system; Feedback; Optimization methods; Partitioning algorithms; Predictive models;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 1998. Proceedings of the IEEE 1998

Conference_Location

Santa Clara, CA

Print_ISBN

0-7803-4292-5

Type

conf

DOI

10.1109/CICC.1998.694918

Filename

694918