Title :
Trends in bipolar static random access memory (SRAM) design
Author :
Herndon, William H.
Author_Institution :
Integraph Corp., Palo Alto, CA, USA
Abstract :
A comparison of the high-performance static random access memories (SRAMs) of today to those of 20 years ago (1969) shows that the performance has been increased by a factor of 10 while costs have been improved by a factor of 100. An overview of SRAM circuits is provided, covering early configurations; ECL memory cells; alpha-particle soft errors; cross-coupled SCR cells; I2L (or MTL); BiCMOS and CMOS RAMs with ECL I/O: and cache-size requirements for high-performance systems. It is seen that the consistent evolutionary path has been to maximize performance by minimizing the power dissipation in the inactive portion of the circuit. High-performance computing systems require cache/main-memory combinations capable of matching processor speed. In these systems, the delay of the interconnect communicating with the cache is a significant portion of the total cycle time
Keywords :
bipolar integrated circuits; integrated circuit technology; integrated memory circuits; random-access storage; BiCMOS; CMOS RAMs; ECL I/O; ECL memory cells; I2L; MTL; SRAM circuits; alpha-particle soft errors; bipolar static random access memory; cache-size requirements; cache/main-memory combinations; configurations; costs; cross-coupled SCR cells; evolutionary path; interconnect delays; overview; performance; power dissipation minimization; BiCMOS integrated circuits; CMOS memory circuits; Costs; Delay effects; Delay systems; Integrated circuit interconnections; Power dissipation; Random access memory; SRAM chips; Thyristors;
Conference_Titel :
Bipolar Circuits and Technology Meeting, 1989., Proceedings of the 1989
Conference_Location :
Minneapolis, MN
DOI :
10.1109/BIPOL.1989.69492
